From 7bece0f03bf6cbf7f98812b7cff0e789709c9982 Mon Sep 17 00:00:00 2001
From: Emmmer <yjhdandan@163.com>
Date: Wed, 10 Aug 2022 21:36:20 +0800
Subject: [PATCH] [LLDB][RISCV] Add riscv register definition and read/write

This patch is based on the minimal extract of D128250.

What is implemented:
- Use the same register layout as Linux kernel and mock read/write for `x0` register (the always zero register).
- Refactor some duplicate code, and delete unused register definitions.

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D130342
---
 lldb/source/Host/common/HostInfoBase.cpp      |   1 +
 .../Plugins/Process/Linux/CMakeLists.txt      |   1 +
 .../NativeRegisterContextLinux_riscv64.cpp    | 343 ++++++++++++++++++
 .../NativeRegisterContextLinux_riscv64.h      |  92 +++++
 .../Plugins/Process/Utility/CMakeLists.txt    |   2 +
 .../Utility/RegisterContextPOSIX_riscv64.cpp  |  82 +++++
 .../Utility/RegisterContextPOSIX_riscv64.h    |  63 ++++
 .../Utility/RegisterInfoPOSIX_riscv64.cpp     | 141 +++++++
 .../Utility/RegisterInfoPOSIX_riscv64.h       |  61 ++++
 .../Process/Utility/RegisterInfos_riscv64.h   | 135 +++++++
 .../Utility/lldb-riscv-register-enums.h       |  70 +---
 11 files changed, 935 insertions(+), 56 deletions(-)
 create mode 100644 lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
 create mode 100644 lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
 create mode 100644 lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
 create mode 100644 lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h
 create mode 100644 lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
 create mode 100644 lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
 create mode 100644 lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h

diff --git lldb/source/Host/common/HostInfoBase.cpp lldb/source/Host/common/HostInfoBase.cpp
index caed8a35de21e..e8088344422a7 100644
--- lldb/source/Host/common/HostInfoBase.cpp
+++ lldb/source/Host/common/HostInfoBase.cpp
@@ -339,6 +339,7 @@ void HostInfoBase::ComputeHostArchitectureSupport(ArchSpec &arch_32,
   case llvm::Triple::ppc64:
   case llvm::Triple::ppc64le:
   case llvm::Triple::x86_64:
+  case llvm::Triple::riscv64:
     arch_64.SetTriple(triple);
     arch_32.SetTriple(triple.get32BitArchVariant());
     break;
diff --git lldb/source/Plugins/Process/Linux/CMakeLists.txt lldb/source/Plugins/Process/Linux/CMakeLists.txt
index 36d5037b04862..b35c7de7c0028 100644
--- lldb/source/Plugins/Process/Linux/CMakeLists.txt
+++ lldb/source/Plugins/Process/Linux/CMakeLists.txt
@@ -9,6 +9,7 @@ add_lldb_library(lldbPluginProcessLinux
   NativeRegisterContextLinux_arm.cpp
   NativeRegisterContextLinux_arm64.cpp
   NativeRegisterContextLinux_ppc64le.cpp
+  NativeRegisterContextLinux_riscv64.cpp
   NativeRegisterContextLinux_s390x.cpp
   NativeRegisterContextLinux_x86_64.cpp
   NativeThreadLinux.cpp
diff --git lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
new file mode 100644
index 0000000000000..135254962af05
--- /dev/null
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.cpp
@@ -0,0 +1,343 @@
+//===-- NativeRegisterContextLinux_riscv64.cpp ----------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#if defined(__riscv) && __riscv_xlen == 64
+
+#include "NativeRegisterContextLinux_riscv64.h"
+
+#include "lldb/Utility/DataBufferHeap.h"
+#include "lldb/Utility/Log.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "lldb/Utility/Status.h"
+
+#include "Plugins/Process/Linux/NativeProcessLinux.h"
+#include "Plugins/Process/Linux/Procfs.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h"
+#include "Plugins/Process/Utility/lldb-riscv-register-enums.h"
+
+// System includes - They have to be included after framework includes because
+// they define some macros which collide with variable names in other modules
+#include <sys/uio.h>
+// NT_PRSTATUS and NT_FPREGSET definition
+#include <elf.h>
+
+#define REG_CONTEXT_SIZE (GetGPRSize() + GetFPRSize())
+
+using namespace lldb;
+using namespace lldb_private;
+using namespace lldb_private::process_linux;
+
+std::unique_ptr<NativeRegisterContextLinux>
+NativeRegisterContextLinux::CreateHostNativeRegisterContextLinux(
+    const ArchSpec &target_arch, NativeThreadLinux &native_thread) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::riscv64: {
+    Flags opt_regsets;
+    auto register_info_up =
+        std::make_unique<RegisterInfoPOSIX_riscv64>(target_arch, opt_regsets);
+    return std::make_unique<NativeRegisterContextLinux_riscv64>(
+        target_arch, native_thread, std::move(register_info_up));
+  }
+  default:
+    llvm_unreachable("have no register context for architecture");
+  }
+}
+
+NativeRegisterContextLinux_riscv64::NativeRegisterContextLinux_riscv64(
+    const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
+    std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up)
+    : NativeRegisterContextRegisterInfo(native_thread,
+                                        register_info_up.release()),
+      NativeRegisterContextLinux(native_thread) {
+  ::memset(&m_fpr, 0, sizeof(m_fpr));
+  ::memset(&m_gpr, 0, sizeof(m_gpr));
+
+  m_gpr_is_valid = false;
+  m_fpu_is_valid = false;
+}
+
+const RegisterInfoPOSIX_riscv64 &
+NativeRegisterContextLinux_riscv64::GetRegisterInfo() const {
+  return static_cast<const RegisterInfoPOSIX_riscv64 &>(
+      NativeRegisterContextRegisterInfo::GetRegisterInfoInterface());
+}
+
+uint32_t NativeRegisterContextLinux_riscv64::GetRegisterSetCount() const {
+  return GetRegisterInfo().GetRegisterSetCount();
+}
+
+const RegisterSet *
+NativeRegisterContextLinux_riscv64::GetRegisterSet(uint32_t set_index) const {
+  return GetRegisterInfo().GetRegisterSet(set_index);
+}
+
+uint32_t NativeRegisterContextLinux_riscv64::GetUserRegisterCount() const {
+  uint32_t count = 0;
+  for (uint32_t set_index = 0; set_index < GetRegisterSetCount(); ++set_index)
+    count += GetRegisterSet(set_index)->num_registers;
+  return count;
+}
+
+Status
+NativeRegisterContextLinux_riscv64::ReadRegister(const RegisterInfo *reg_info,
+                                                 RegisterValue &reg_value) {
+  Status error;
+
+  if (!reg_info) {
+    error.SetErrorString("reg_info NULL");
+    return error;
+  }
+
+  const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+
+  if (reg == LLDB_INVALID_REGNUM)
+    return Status("no lldb regnum for %s", reg_info && reg_info->name
+                                               ? reg_info->name
+                                               : "<unknown register>");
+
+  if (reg == gpr_x0_riscv) {
+    reg_value.SetUInt(0, reg_info->byte_size);
+    return error;
+  }
+
+  uint8_t *src = nullptr;
+  uint32_t offset = LLDB_INVALID_INDEX32;
+
+  if (IsGPR(reg)) {
+    error = ReadGPR();
+    if (error.Fail())
+      return error;
+
+    offset = reg_info->byte_offset;
+    assert(offset < GetGPRSize());
+    src = (uint8_t *)GetGPRBuffer() + offset;
+
+  } else if (IsFPR(reg)) {
+    error = ReadFPR();
+    if (error.Fail())
+      return error;
+
+    offset = CalculateFprOffset(reg_info);
+    assert(offset < GetFPRSize());
+    src = (uint8_t *)GetFPRBuffer() + offset;
+  } else
+    return Status("failed - register wasn't recognized to be a GPR or an FPR, "
+                  "write strategy unknown");
+
+  reg_value.SetFromMemoryData(reg_info, src, reg_info->byte_size,
+                              eByteOrderLittle, error);
+
+  return error;
+}
+
+Status NativeRegisterContextLinux_riscv64::WriteRegister(
+    const RegisterInfo *reg_info, const RegisterValue &reg_value) {
+  Status error;
+
+  if (!reg_info)
+    return Status("reg_info NULL");
+
+  const uint32_t reg = reg_info->kinds[lldb::eRegisterKindLLDB];
+
+  if (reg == LLDB_INVALID_REGNUM)
+    return Status("no lldb regnum for %s", reg_info->name != nullptr
+                                               ? reg_info->name
+                                               : "<unknown register>");
+
+  if (reg == gpr_x0_riscv) {
+    // do nothing.
+    return error;
+  }
+
+  uint8_t *dst = nullptr;
+  uint32_t offset = LLDB_INVALID_INDEX32;
+
+  if (IsGPR(reg)) {
+    error = ReadGPR();
+    if (error.Fail())
+      return error;
+
+    assert(reg_info->byte_offset < GetGPRSize());
+    dst = (uint8_t *)GetGPRBuffer() + reg_info->byte_offset;
+    ::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
+
+    return WriteGPR();
+  } else if (IsFPR(reg)) {
+    error = ReadFPR();
+    if (error.Fail())
+      return error;
+
+    offset = CalculateFprOffset(reg_info);
+    assert(offset < GetFPRSize());
+    dst = (uint8_t *)GetFPRBuffer() + offset;
+    ::memcpy(dst, reg_value.GetBytes(), reg_info->byte_size);
+
+    return WriteFPR();
+  }
+
+  return Status("Failed to write register value");
+}
+
+Status NativeRegisterContextLinux_riscv64::ReadAllRegisterValues(
+    lldb::WritableDataBufferSP &data_sp) {
+  Status error;
+
+  data_sp.reset(new DataBufferHeap(REG_CONTEXT_SIZE, 0));
+
+  error = ReadGPR();
+  if (error.Fail())
+    return error;
+
+  error = ReadFPR();
+  if (error.Fail())
+    return error;
+
+  uint8_t *dst = const_cast<uint8_t *>(data_sp->GetBytes());
+  ::memcpy(dst, GetGPRBuffer(), GetGPRSize());
+  dst += GetGPRSize();
+  ::memcpy(dst, GetFPRBuffer(), GetFPRSize());
+
+  return error;
+}
+
+Status NativeRegisterContextLinux_riscv64::WriteAllRegisterValues(
+    const lldb::DataBufferSP &data_sp) {
+  Status error;
+
+  if (!data_sp) {
+    error.SetErrorStringWithFormat(
+        "NativeRegisterContextLinux_riscv64::%s invalid data_sp provided",
+        __FUNCTION__);
+    return error;
+  }
+
+  if (data_sp->GetByteSize() != REG_CONTEXT_SIZE) {
+    error.SetErrorStringWithFormat(
+        "NativeRegisterContextLinux_riscv64::%s data_sp contained mismatched "
+        "data size, expected %" PRIu64 ", actual %" PRIu64,
+        __FUNCTION__, REG_CONTEXT_SIZE, data_sp->GetByteSize());
+    return error;
+  }
+
+  uint8_t *src = const_cast<uint8_t *>(data_sp->GetBytes());
+  if (src == nullptr) {
+    error.SetErrorStringWithFormat("NativeRegisterContextLinux_riscv64::%s "
+                                   "DataBuffer::GetBytes() returned a null "
+                                   "pointer",
+                                   __FUNCTION__);
+    return error;
+  }
+  ::memcpy(GetGPRBuffer(), src, GetRegisterInfoInterface().GetGPRSize());
+
+  error = WriteGPR();
+  if (error.Fail())
+    return error;
+
+  src += GetRegisterInfoInterface().GetGPRSize();
+  ::memcpy(GetFPRBuffer(), src, GetFPRSize());
+
+  error = WriteFPR();
+  if (error.Fail())
+    return error;
+
+  return error;
+}
+
+bool NativeRegisterContextLinux_riscv64::IsGPR(unsigned reg) const {
+  return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
+         RegisterInfoPOSIX_riscv64::GPRegSet;
+}
+
+bool NativeRegisterContextLinux_riscv64::IsFPR(unsigned reg) const {
+  return GetRegisterInfo().GetRegisterSetFromRegisterIndex(reg) ==
+         RegisterInfoPOSIX_riscv64::FPRegSet;
+}
+
+Status NativeRegisterContextLinux_riscv64::ReadGPR() {
+  Status error;
+
+  if (m_gpr_is_valid)
+    return error;
+
+  struct iovec ioVec;
+  ioVec.iov_base = GetGPRBuffer();
+  ioVec.iov_len = GetGPRSize();
+
+  error = ReadRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
+
+  if (error.Success())
+    m_gpr_is_valid = true;
+
+  return error;
+}
+
+Status NativeRegisterContextLinux_riscv64::WriteGPR() {
+  Status error = ReadGPR();
+  if (error.Fail())
+    return error;
+
+  struct iovec ioVec;
+  ioVec.iov_base = GetGPRBuffer();
+  ioVec.iov_len = GetGPRSize();
+
+  m_gpr_is_valid = false;
+
+  return WriteRegisterSet(&ioVec, GetGPRSize(), NT_PRSTATUS);
+}
+
+Status NativeRegisterContextLinux_riscv64::ReadFPR() {
+  Status error;
+
+  if (m_fpu_is_valid)
+    return error;
+
+  struct iovec ioVec;
+  ioVec.iov_base = GetFPRBuffer();
+  ioVec.iov_len = GetFPRSize();
+
+  error = ReadRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
+
+  if (error.Success())
+    m_fpu_is_valid = true;
+
+  return error;
+}
+
+Status NativeRegisterContextLinux_riscv64::WriteFPR() {
+  Status error = ReadFPR();
+  if (error.Fail())
+    return error;
+
+  struct iovec ioVec;
+  ioVec.iov_base = GetFPRBuffer();
+  ioVec.iov_len = GetFPRSize();
+
+  m_fpu_is_valid = false;
+
+  return WriteRegisterSet(&ioVec, GetFPRSize(), NT_FPREGSET);
+}
+
+void NativeRegisterContextLinux_riscv64::InvalidateAllRegisters() {
+  m_gpr_is_valid = false;
+  m_fpu_is_valid = false;
+}
+
+uint32_t NativeRegisterContextLinux_riscv64::CalculateFprOffset(
+    const RegisterInfo *reg_info) const {
+  return reg_info->byte_offset - GetGPRSize();
+}
+
+std::vector<uint32_t> NativeRegisterContextLinux_riscv64::GetExpeditedRegisters(
+    ExpeditedRegs expType) const {
+  std::vector<uint32_t> expedited_reg_nums =
+      NativeRegisterContext::GetExpeditedRegisters(expType);
+
+  return expedited_reg_nums;
+}
+
+#endif // defined (__riscv) && __riscv_xlen == 64
diff --git lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
new file mode 100644
index 0000000000000..41b4e2573add9
--- /dev/null
+++ lldb/source/Plugins/Process/Linux/NativeRegisterContextLinux_riscv64.h
@@ -0,0 +1,92 @@
+//===-- NativeRegisterContextLinux_riscv64.h -------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#if defined(__riscv) && __riscv_xlen == 64
+
+#ifndef lldb_NativeRegisterContextLinux_riscv64_h
+#define lldb_NativeRegisterContextLinux_riscv64_h
+
+#include "Plugins/Process/Linux/NativeRegisterContextLinux.h"
+#include "Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h"
+
+#include <asm/ptrace.h>
+
+namespace lldb_private {
+namespace process_linux {
+
+class NativeProcessLinux;
+
+class NativeRegisterContextLinux_riscv64 : public NativeRegisterContextLinux {
+public:
+  NativeRegisterContextLinux_riscv64(
+      const ArchSpec &target_arch, NativeThreadProtocol &native_thread,
+      std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info_up);
+
+  uint32_t GetRegisterSetCount() const override;
+
+  uint32_t GetUserRegisterCount() const override;
+
+  const RegisterSet *GetRegisterSet(uint32_t set_index) const override;
+
+  Status ReadRegister(const RegisterInfo *reg_info,
+                      RegisterValue &reg_value) override;
+
+  Status WriteRegister(const RegisterInfo *reg_info,
+                       const RegisterValue &reg_value) override;
+
+  Status ReadAllRegisterValues(lldb::WritableDataBufferSP &data_sp) override;
+
+  Status WriteAllRegisterValues(const lldb::DataBufferSP &data_sp) override;
+
+  void InvalidateAllRegisters() override;
+
+  std::vector<uint32_t>
+  GetExpeditedRegisters(ExpeditedRegs expType) const override;
+
+  bool RegisterOffsetIsDynamic() const override { return true; }
+
+protected:
+  Status ReadGPR() override;
+
+  Status WriteGPR() override;
+
+  Status ReadFPR() override;
+
+  Status WriteFPR() override;
+
+  void *GetGPRBuffer() override { return &m_gpr; }
+
+  void *GetFPRBuffer() override { return &m_fpr; }
+
+  size_t GetGPRSize() const override { return GetRegisterInfo().GetGPRSize(); }
+
+  size_t GetFPRSize() override { return GetRegisterInfo().GetFPRSize(); }
+
+private:
+  bool m_gpr_is_valid;
+  bool m_fpu_is_valid;
+
+  RegisterInfoPOSIX_riscv64::GPR m_gpr;
+
+  RegisterInfoPOSIX_riscv64::FPR m_fpr;
+
+  bool IsGPR(unsigned reg) const;
+
+  bool IsFPR(unsigned reg) const;
+
+  uint32_t CalculateFprOffset(const RegisterInfo *reg_info) const;
+
+  const RegisterInfoPOSIX_riscv64 &GetRegisterInfo() const;
+};
+
+} // namespace process_linux
+} // namespace lldb_private
+
+#endif // #ifndef lldb_NativeRegisterContextLinux_riscv64_h
+
+#endif // defined(__riscv) && __riscv_xlen == 64
diff --git lldb/source/Plugins/Process/Utility/CMakeLists.txt lldb/source/Plugins/Process/Utility/CMakeLists.txt
index 2a06af008dcec..c300245cf290d 100644
--- lldb/source/Plugins/Process/Utility/CMakeLists.txt
+++ lldb/source/Plugins/Process/Utility/CMakeLists.txt
@@ -41,6 +41,7 @@ add_lldb_library(lldbPluginProcessUtility
   RegisterContextPOSIX_mips64.cpp
   RegisterContextPOSIX_powerpc.cpp
   RegisterContextPOSIX_ppc64le.cpp
+  RegisterContextPOSIX_riscv64.cpp
   RegisterContextPOSIX_s390x.cpp
   RegisterContextPOSIX_x86.cpp
   RegisterContextThreadMemory.cpp
@@ -49,6 +50,7 @@ add_lldb_library(lldbPluginProcessUtility
   RegisterInfoPOSIX_arm.cpp
   RegisterInfoPOSIX_arm64.cpp
   RegisterInfoPOSIX_ppc64le.cpp
+  RegisterInfoPOSIX_riscv64.cpp
   StopInfoMachException.cpp
   ThreadMemory.cpp
 
diff --git lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
new file mode 100644
index 0000000000000..1834a94dc0260
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.cpp
@@ -0,0 +1,82 @@
+//===-- RegisterContextPOSIX_riscv64.cpp ------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#include "lldb/Target/Process.h"
+#include "lldb/Target/Target.h"
+#include "lldb/Target/Thread.h"
+#include "lldb/Utility/DataBufferHeap.h"
+#include "lldb/Utility/DataExtractor.h"
+#include "lldb/Utility/Endian.h"
+#include "lldb/Utility/RegisterValue.h"
+#include "lldb/Utility/Scalar.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterContextPOSIX_riscv64.h"
+
+using namespace lldb;
+using namespace lldb_private;
+
+RegisterContextPOSIX_riscv64::RegisterContextPOSIX_riscv64(
+    lldb_private::Thread &thread,
+    std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info)
+    : lldb_private::RegisterContext(thread, 0),
+      m_register_info_up(std::move(register_info)) {}
+
+RegisterContextPOSIX_riscv64::~RegisterContextPOSIX_riscv64() = default;
+
+void RegisterContextPOSIX_riscv64::invalidate() {}
+
+void RegisterContextPOSIX_riscv64::InvalidateAllRegisters() {}
+
+size_t RegisterContextPOSIX_riscv64::GetRegisterCount() {
+  return m_register_info_up->GetRegisterCount();
+}
+
+size_t RegisterContextPOSIX_riscv64::GetGPRSize() {
+  return m_register_info_up->GetGPRSize();
+}
+
+unsigned RegisterContextPOSIX_riscv64::GetRegisterSize(unsigned int reg) {
+  return m_register_info_up->GetRegisterInfo()[reg].byte_size;
+}
+
+unsigned RegisterContextPOSIX_riscv64::GetRegisterOffset(unsigned int reg) {
+  return m_register_info_up->GetRegisterInfo()[reg].byte_offset;
+}
+
+const lldb_private::RegisterInfo *
+RegisterContextPOSIX_riscv64::GetRegisterInfoAtIndex(size_t reg) {
+  if (reg < GetRegisterCount())
+    return &GetRegisterInfo()[reg];
+
+  return nullptr;
+}
+
+size_t RegisterContextPOSIX_riscv64::GetRegisterSetCount() {
+  return m_register_info_up->GetRegisterCount();
+}
+
+const lldb_private::RegisterSet *
+RegisterContextPOSIX_riscv64::GetRegisterSet(size_t set) {
+  return m_register_info_up->GetRegisterSet(set);
+}
+
+const lldb_private::RegisterInfo *
+RegisterContextPOSIX_riscv64::GetRegisterInfo() {
+  return m_register_info_up->GetRegisterInfo();
+}
+
+bool RegisterContextPOSIX_riscv64::IsGPR(unsigned int reg) {
+  return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+         RegisterInfoPOSIX_riscv64::GPRegSet;
+}
+
+bool RegisterContextPOSIX_riscv64::IsFPR(unsigned int reg) {
+  return m_register_info_up->GetRegisterSetFromRegisterIndex(reg) ==
+         RegisterInfoPOSIX_riscv64::FPRegSet;
+}
diff --git lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h
new file mode 100644
index 0000000000000..2431ed6ab8c6d
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterContextPOSIX_riscv64.h
@@ -0,0 +1,63 @@
+//===-- RegisterContextPOSIX_riscv64.h --------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV64_H
+
+#include "RegisterInfoInterface.h"
+#include "RegisterInfoPOSIX_riscv64.h"
+#include "lldb-riscv-register-enums.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/Utility/Log.h"
+
+class RegisterContextPOSIX_riscv64 : public lldb_private::RegisterContext {
+public:
+  RegisterContextPOSIX_riscv64(
+      lldb_private::Thread &thread,
+      std::unique_ptr<RegisterInfoPOSIX_riscv64> register_info);
+
+  ~RegisterContextPOSIX_riscv64() override;
+
+  void invalidate();
+
+  void InvalidateAllRegisters() override;
+
+  size_t GetRegisterCount() override;
+
+  virtual size_t GetGPRSize();
+
+  virtual unsigned GetRegisterSize(unsigned reg);
+
+  virtual unsigned GetRegisterOffset(unsigned reg);
+
+  const lldb_private::RegisterInfo *GetRegisterInfoAtIndex(size_t reg) override;
+
+  size_t GetRegisterSetCount() override;
+
+  const lldb_private::RegisterSet *GetRegisterSet(size_t set) override;
+
+protected:
+  std::unique_ptr<RegisterInfoPOSIX_riscv64> m_register_info_up;
+
+  virtual const lldb_private::RegisterInfo *GetRegisterInfo();
+
+  bool IsGPR(unsigned reg);
+
+  bool IsFPR(unsigned reg);
+
+  size_t GetFPRSize() { return sizeof(RegisterInfoPOSIX_riscv64::FPR); }
+
+  uint32_t GetRegNumFCSR() const { return fpr_fcsr_riscv; }
+
+  virtual bool ReadGPR() = 0;
+  virtual bool ReadFPR() = 0;
+  virtual bool WriteGPR() = 0;
+  virtual bool WriteFPR() = 0;
+};
+
+#endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERCONTEXTPOSIX_RISCV64_H
diff --git lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
new file mode 100644
index 0000000000000..06c4e8ec68537
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.cpp
@@ -0,0 +1,141 @@
+//===-- RegisterInfoPOSIX_riscv64.cpp -------------------------------------===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===---------------------------------------------------------------------===//
+
+#include <cassert>
+#include <lldb/Utility/Flags.h>
+#include <stddef.h>
+
+#include "lldb/lldb-defines.h"
+#include "llvm/Support/Compiler.h"
+
+#include "RegisterInfoPOSIX_riscv64.h"
+
+#define GPR_OFFSET(idx) ((idx)*8 + 0)
+#define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_riscv64::GPR))
+
+#define REG_CONTEXT_SIZE                                                       \
+  (sizeof(RegisterInfoPOSIX_riscv64::GPR) +                                    \
+   sizeof(RegisterInfoPOSIX_riscv64::FPR))
+
+#define DECLARE_REGISTER_INFOS_RISCV64_STRUCT
+#include "RegisterInfos_riscv64.h"
+#undef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
+
+const lldb_private::RegisterInfo *RegisterInfoPOSIX_riscv64::GetRegisterInfoPtr(
+    const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::riscv64:
+    return g_register_infos_riscv64_le;
+  default:
+    assert(false && "Unhandled target architecture.");
+    return nullptr;
+  }
+}
+
+uint32_t RegisterInfoPOSIX_riscv64::GetRegisterInfoCount(
+    const lldb_private::ArchSpec &target_arch) {
+  switch (target_arch.GetMachine()) {
+  case llvm::Triple::riscv64:
+    return static_cast<uint32_t>(sizeof(g_register_infos_riscv64_le) /
+                                 sizeof(g_register_infos_riscv64_le[0]));
+  default:
+    assert(false && "Unhandled target architecture.");
+    return 0;
+  }
+}
+
+// Number of register sets provided by this context.
+enum {
+  k_num_gpr_registers = gpr_last_riscv - gpr_first_riscv + 1,
+  k_num_fpr_registers = fpr_last_riscv - fpr_first_riscv + 1,
+  k_num_register_sets = 2
+};
+
+// RISC-V64 general purpose registers.
+static const uint32_t g_gpr_regnums_riscv64[] = {
+    gpr_pc_riscv,  gpr_ra_riscv,       gpr_sp_riscv,  gpr_x3_riscv,
+    gpr_x4_riscv,  gpr_x5_riscv,       gpr_x6_riscv,  gpr_x7_riscv,
+    gpr_fp_riscv,  gpr_x9_riscv,       gpr_x10_riscv, gpr_x11_riscv,
+    gpr_x12_riscv, gpr_x13_riscv,      gpr_x14_riscv, gpr_x15_riscv,
+    gpr_x16_riscv, gpr_x17_riscv,      gpr_x18_riscv, gpr_x19_riscv,
+    gpr_x20_riscv, gpr_x21_riscv,      gpr_x22_riscv, gpr_x23_riscv,
+    gpr_x24_riscv, gpr_x25_riscv,      gpr_x26_riscv, gpr_x27_riscv,
+    gpr_x28_riscv, gpr_x29_riscv,      gpr_x30_riscv, gpr_x31_riscv,
+    gpr_x0_riscv,  LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_gpr_regnums_riscv64 /
+                sizeof g_gpr_regnums_riscv64[0]) -
+               1) == k_num_gpr_registers,
+              "g_gpr_regnums_riscv64 has wrong number of register infos");
+
+// RISC-V64 floating point registers.
+static const uint32_t g_fpr_regnums_riscv64[] = {
+    fpr_f0_riscv,   fpr_f1_riscv,       fpr_f2_riscv,  fpr_f3_riscv,
+    fpr_f4_riscv,   fpr_f5_riscv,       fpr_f6_riscv,  fpr_f7_riscv,
+    fpr_f8_riscv,   fpr_f9_riscv,       fpr_f10_riscv, fpr_f11_riscv,
+    fpr_f12_riscv,  fpr_f13_riscv,      fpr_f14_riscv, fpr_f15_riscv,
+    fpr_f16_riscv,  fpr_f17_riscv,      fpr_f18_riscv, fpr_f19_riscv,
+    fpr_f20_riscv,  fpr_f21_riscv,      fpr_f22_riscv, fpr_f23_riscv,
+    fpr_f24_riscv,  fpr_f25_riscv,      fpr_f26_riscv, fpr_f27_riscv,
+    fpr_f28_riscv,  fpr_f29_riscv,      fpr_f30_riscv, fpr_f31_riscv,
+    fpr_fcsr_riscv, LLDB_INVALID_REGNUM};
+
+static_assert(((sizeof g_fpr_regnums_riscv64 /
+                sizeof g_fpr_regnums_riscv64[0]) -
+               1) == k_num_fpr_registers,
+              "g_fpr_regnums_riscv64 has wrong number of register infos");
+
+// Register sets for RISC-V64.
+static const lldb_private::RegisterSet g_reg_sets_riscv64[k_num_register_sets] =
+    {{"General Purpose Registers", "gpr", k_num_gpr_registers,
+      g_gpr_regnums_riscv64},
+     {"Floating Point Registers", "fpr", k_num_fpr_registers,
+      g_fpr_regnums_riscv64}};
+
+RegisterInfoPOSIX_riscv64::RegisterInfoPOSIX_riscv64(
+    const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
+    : lldb_private::RegisterInfoAndSetInterface(target_arch),
+      m_register_info_p(GetRegisterInfoPtr(target_arch)),
+      m_register_info_count(GetRegisterInfoCount(target_arch)) {}
+
+uint32_t RegisterInfoPOSIX_riscv64::GetRegisterCount() const {
+  return k_num_gpr_registers;
+}
+
+size_t RegisterInfoPOSIX_riscv64::GetGPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_riscv64::GPR);
+}
+
+size_t RegisterInfoPOSIX_riscv64::GetFPRSize() const {
+  return sizeof(struct RegisterInfoPOSIX_riscv64::FPR);
+}
+
+const lldb_private::RegisterInfo *
+RegisterInfoPOSIX_riscv64::GetRegisterInfo() const {
+  return m_register_info_p;
+}
+
+size_t RegisterInfoPOSIX_riscv64::GetRegisterSetCount() const {
+  return k_num_register_sets - 1;
+}
+
+size_t RegisterInfoPOSIX_riscv64::GetRegisterSetFromRegisterIndex(
+    uint32_t reg_index) const {
+  if (reg_index >= gpr_first_riscv && reg_index <= gpr_last_riscv)
+    return GPRegSet;
+  if (reg_index >= fpr_first_riscv && reg_index <= fpr_last_riscv)
+    return FPRegSet;
+  return LLDB_INVALID_REGNUM;
+}
+
+const lldb_private::RegisterSet *
+RegisterInfoPOSIX_riscv64::GetRegisterSet(size_t set_index) const {
+  if (set_index < GetRegisterSetCount())
+    return &g_reg_sets_riscv64[set_index];
+  return nullptr;
+}
diff --git lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
new file mode 100644
index 0000000000000..0e07b910f8559
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_riscv64.h
@@ -0,0 +1,61 @@
+//===-- RegisterInfoPOSIX_riscv64.h -----------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifndef LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_RISCV64_H
+#define LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_REGISTERINFOPOSIX_RISCV64_H
+
+#include "RegisterInfoAndSetInterface.h"
+#include "lldb/Target/RegisterContext.h"
+#include "lldb/lldb-private.h"
+#include <map>
+
+class RegisterInfoPOSIX_riscv64
+    : public lldb_private::RegisterInfoAndSetInterface {
+public:
+  static const lldb_private::RegisterInfo *
+  GetRegisterInfoPtr(const lldb_private::ArchSpec &target_arch);
+  static uint32_t
+  GetRegisterInfoCount(const lldb_private::ArchSpec &target_arch);
+
+public:
+  enum { GPRegSet = 0, FPRegSet };
+
+  struct GPR {
+    // note: gpr[0] is pc, not x0
+    uint64_t gpr[32];
+  };
+
+  struct FPR {
+    uint64_t f[32];
+    uint32_t fcsr;
+  };
+
+  RegisterInfoPOSIX_riscv64(const lldb_private::ArchSpec &target_arch,
+                            lldb_private::Flags flags);
+
+  size_t GetGPRSize() const override;
+
+  size_t GetFPRSize() const override;
+
+  const lldb_private::RegisterInfo *GetRegisterInfo() const override;
+
+  uint32_t GetRegisterCount() const override;
+
+  const lldb_private::RegisterSet *
+  GetRegisterSet(size_t reg_set) const override;
+
+  size_t GetRegisterSetCount() const override;
+
+  size_t GetRegisterSetFromRegisterIndex(uint32_t reg_index) const override;
+
+private:
+  const lldb_private::RegisterInfo *m_register_info_p;
+  uint32_t m_register_info_count;
+};
+
+#endif
diff --git lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h
new file mode 100644
index 0000000000000..ac1ec087e3760
--- /dev/null
+++ lldb/source/Plugins/Process/Utility/RegisterInfos_riscv64.h
@@ -0,0 +1,135 @@
+//===-- RegisterInfos_riscv64.h ---------------------------------*- C++ -*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
+//
+//===----------------------------------------------------------------------===//
+
+#ifdef DECLARE_REGISTER_INFOS_RISCV64_STRUCT
+
+#include <stddef.h>
+
+#include "lldb/lldb-defines.h"
+#include "lldb/lldb-enumerations.h"
+#include "lldb/lldb-private.h"
+
+#include "Utility/RISCV_DWARF_Registers.h"
+#include "lldb-riscv-register-enums.h"
+
+#ifndef GPR_OFFSET
+#error GPR_OFFSET must be defined before including this header file
+#endif
+
+#ifndef FPR_OFFSET
+#error FPR_OFFSET must be defined before including this header file
+#endif
+
+using namespace riscv_dwarf;
+
+// clang-format off
+
+// I suppose EHFrame and DWARF are the same.
+#define KIND_HELPER(reg, generic_kind)                                         \
+  {                                                                            \
+    riscv_dwarf::dwarf_##reg, riscv_dwarf::dwarf_##reg, generic_kind,          \
+    LLDB_INVALID_REGNUM, reg##_riscv                                           \
+  }
+
+// Generates register kinds array for vector registers
+#define GPR64_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
+
+// FPR register kinds array for vector registers
+#define FPR64_KIND(reg, generic_kind) KIND_HELPER(reg, generic_kind)
+
+// Defines a 64-bit general purpose register
+#define DEFINE_GPR64(reg, generic_kind) DEFINE_GPR64_ALT(reg, reg, generic_kind)
+
+// Defines a 64-bit general purpose register
+#define DEFINE_GPR64_ALT(reg, alt, generic_kind)                               \
+  {                                                                            \
+    #reg, #alt, 8, GPR_OFFSET(gpr_##reg##_riscv - gpr_first_riscv),            \
+    lldb::eEncodingUint, lldb::eFormatHex,                                     \
+    GPR64_KIND(gpr_##reg, generic_kind), nullptr, nullptr                      \
+  }
+
+#define DEFINE_FPR64(reg, generic_kind)                                        \
+  {                                                                            \
+    #reg, nullptr, 8, FPR_OFFSET(fpr_##reg##_riscv - fpr_first_riscv),         \
+    lldb::eEncodingUint, lldb::eFormatHex,                                     \
+    FPR64_KIND(fpr_##reg, generic_kind), nullptr, nullptr                      \
+  }
+
+// clang-format on
+
+static lldb_private::RegisterInfo g_register_infos_riscv64_le[] = {
+    // DEFINE_GPR64(name, GENERIC KIND)
+    DEFINE_GPR64(pc, LLDB_REGNUM_GENERIC_PC),
+    DEFINE_GPR64_ALT(ra, x1, LLDB_REGNUM_GENERIC_RA),
+    DEFINE_GPR64_ALT(sp, x2, LLDB_REGNUM_GENERIC_SP),
+    DEFINE_GPR64(x3, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x4, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x5, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x6, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x7, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64_ALT(fp, x8, LLDB_REGNUM_GENERIC_FP),
+    DEFINE_GPR64(x9, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x10, LLDB_REGNUM_GENERIC_ARG1),
+    DEFINE_GPR64(x11, LLDB_REGNUM_GENERIC_ARG2),
+    DEFINE_GPR64(x12, LLDB_REGNUM_GENERIC_ARG3),
+    DEFINE_GPR64(x13, LLDB_REGNUM_GENERIC_ARG4),
+    DEFINE_GPR64(x14, LLDB_REGNUM_GENERIC_ARG5),
+    DEFINE_GPR64(x15, LLDB_REGNUM_GENERIC_ARG6),
+    DEFINE_GPR64(x16, LLDB_REGNUM_GENERIC_ARG7),
+    DEFINE_GPR64(x17, LLDB_REGNUM_GENERIC_ARG8),
+    DEFINE_GPR64(x18, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x19, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x20, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x21, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x22, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x23, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x24, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x25, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x26, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x27, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x28, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x29, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x30, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x31, LLDB_INVALID_REGNUM),
+    DEFINE_GPR64(x0, LLDB_INVALID_REGNUM),
+
+    DEFINE_FPR64(f0, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f1, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f2, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f3, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f4, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f5, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f6, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f7, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f8, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f9, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f10, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f11, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f12, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f13, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f14, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f15, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f16, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f17, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f18, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f19, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f20, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f21, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f22, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f23, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f24, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f25, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f26, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f27, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f28, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f29, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f30, LLDB_INVALID_REGNUM),
+    DEFINE_FPR64(f31, LLDB_INVALID_REGNUM),
+};
+
+#endif // DECLARE_REGISTER_INFOS_RISCV64_STRUCT
diff --git lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h
index 9acf181b4a565..820bf6aaf9888 100644
--- lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h
+++ lldb/source/Plugins/Process/Utility/lldb-riscv-register-enums.h
@@ -13,8 +13,10 @@
 
 // Internal codes for all riscv registers.
 enum {
-  k_first_gpr_riscv,
-  gpr_x0_riscv = k_first_gpr_riscv,
+  // The same order as user_regs_struct in <asm/ptrace.h>
+  // note: these enum values are used as byte_offset
+  gpr_first_riscv = 0,
+  gpr_pc_riscv = gpr_first_riscv,
   gpr_x1_riscv,
   gpr_x2_riscv,
   gpr_x3_riscv,
@@ -46,12 +48,14 @@ enum {
   gpr_x29_riscv,
   gpr_x30_riscv,
   gpr_x31_riscv,
-  gpr_pc_riscv,
+  gpr_x0_riscv,
+  gpr_last_riscv = gpr_x0_riscv,
+  gpr_ra_riscv = gpr_x1_riscv,
+  gpr_sp_riscv = gpr_x2_riscv,
+  gpr_fp_riscv = gpr_x8_riscv,
 
-  k_last_gpr_riscv = gpr_pc_riscv,
-
-  k_first_fpr_riscv,
-  fpr_f0_riscv = k_first_fpr_riscv,
+  fpr_first_riscv = 33,
+  fpr_f0_riscv = fpr_first_riscv,
   fpr_f1_riscv,
   fpr_f2_riscv,
   fpr_f3_riscv,
@@ -83,57 +87,11 @@ enum {
   fpr_f29_riscv,
   fpr_f30_riscv,
   fpr_f31_riscv,
-  fpr_fflags_riscv,
-  fpr_frm_riscv,
-  fpr_fcsr_riscv,
-  k_last_fpr_riscv = fpr_fcsr_riscv,
 
-  k_first_vcr_riscv,
-  vcr_v0_riscv = k_first_vcr_riscv,
-  vcr_v1_riscv,
-  vcr_v2_riscv,
-  vcr_v3_riscv,
-  vcr_v4_riscv,
-  vcr_v5_riscv,
-  vcr_v6_riscv,
-  vcr_v7_riscv,
-  vcr_v8_riscv,
-  vcr_v9_riscv,
-  vcr_v10_riscv,
-  vcr_v11_riscv,
-  vcr_v12_riscv,
-  vcr_v13_riscv,
-  vcr_v14_riscv,
-  vcr_v15_riscv,
-  vcr_v16_riscv,
-  vcr_v17_riscv,
-  vcr_v18_riscv,
-  vcr_v19_riscv,
-  vcr_v20_riscv,
-  vcr_v21_riscv,
-  vcr_v22_riscv,
-  vcr_v23_riscv,
-  vcr_v24_riscv,
-  vcr_v25_riscv,
-  vcr_v26_riscv,
-  vcr_v27_riscv,
-  vcr_v28_riscv,
-  vcr_v29_riscv,
-  vcr_v30_riscv,
-  vcr_v31_riscv,
-  vcr_vstart_riscv,
-  vcr_vxsat_riscv,
-  vcr_vxrm_riscv,
-  vcr_vcsr_riscv,
-  vcr_vl_riscv,
-  vcr_vtype_riscv,
-  vcr_vlenb_riscv,
-  k_last_vcr_riscv = vcr_vlenb_riscv,
+  fpr_fcsr_riscv,
+  fpr_last_riscv = fpr_fcsr_riscv,
 
-  k_num_registers_riscv,
-  k_num_gpr_registers_riscv = k_last_gpr_riscv - k_first_gpr_riscv + 1,
-  k_num_fpr_registers_riscv = k_last_fpr_riscv - k_first_fpr_riscv + 1,
-  k_num_vcr_registers_riscv = k_last_vcr_riscv - k_first_vcr_riscv + 1,
+  k_num_registers_riscv
 };
 
 #endif // LLDB_SOURCE_PLUGINS_PROCESS_UTILITY_LLDB_RISCV_REGISTER_ENUMS_H
